Job Description:
Responsibilities:
Lead the product development lifecycle for cutting-edge semiconductor electronics and ASICs.
Collaborate with cross-functional teams to innovate and integrate mixed-signal and chiplet designs.
Drive advancements in chiplet integration and high-speed chiplet I/O.
Ensure signal and power integrity throughout the design and implementation phases.
Stay abreast of the latest trends and technologies in advanced packaging and semiconductor processing.
Requirements:
Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field.
At least 10 years of experience in semiconductor electronics and ASIC design.
Proficiency in mixed-signal design and chiplet design.
In-depth knowledge of advanced packaging, BEOL and FEOL semiconductor processing.
Experience with current packaging technologies and substrate technologies for advanced packaging.
Strong expertise in chiplet integration and high-speed chiplet I/O.
Proven track record in ensuring signal integrity and power integrity in complex designs.
Collaborate with cross-functional teams to ensure seamless integration and timely delivery of projects.
Mentor and guide junior engineers, fostering a culture of continuous learning and innovation.
Preferred Qualifications:
Ph.D. in a relevant field.
Experience with leading industry-standard design and simulation tools.
Published works or patents in semiconductor technologies.
Excellent leadership, communication, and project management skills.
Must Have:
10+ years in semiconductor electronics / ASIC design
Expertise in mixed-signal and chiplet design
Deep knowledge of advanced packaging, BEOL & FEOL processing
Strong skills in chiplet integration and high-speed chiplet I/O
Proven signal & power integrity expertise
Degree in EE/CE (Master's preferred)
Cross-functional collaboration & mentorship experience
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